Walter Lloyd Wimer III

165 Winterbrook Drive
Cranberry Township, PA 16066-7719

Home phone: 724-453-1892
Mobile phone: 412-965-1273


Seeking a senior software design position developing low-level / embedded / real-time software, ideally one that will utilize my strong networking protocol knowledge and expertise.


Excellent networking and low-level software skills with 20 years of professional experience.



Broad and in-depth expert knowledge of the Internet Protocol Suite (TCP/IP), with focus on IP, MPLS, IP routing protocols such as OSPF, IS-IS, BGP, and RIP. Also service protocols such as DNS, BOOTP, and DHCP. Expertise in modern IP concepts such as longest-prefix-match routing, Quality of Service (e.g. Differentiated Services), and MPLS signaling protocols (RSVP and LDP). Strong familiarity with commercial IP router products (e.g. Cisco IOS). Strong knowledge of most Layer 2 networking technologies including Ethernet, Gigabit Ethernet, Token-Ring, FDDI, Asynchronous Transfer Mode (ATM), PPP, and PPP-over-SONET/SDH (POS). Strong experience with many additional networking issues and concepts such as IEEE 802.1D bridging / spanning-tree, Token-Ring source-route bridging, Ethernet switching, and Ethernet and IP multicast. Some experience with other networking protocol suites such as Novell IPX, AppleTalk, and Microsoft Windows networking (NETBIOS/NETBEUI).

Operating Systems

Strong familiarity and experience with Unix/Linux, including system administration, Linux kernel internals, and network programming (e.g. using the Berkeley socket interface). Experience with embedded RTOSes including TimeSys Linux, VxWorks, and uC/OS. Some experience with OSE and OS-9. User experience with Microsoft operating systems from MS-DOS to Windows XP. User experience with the Cygwin POSIX-emulation layer on Windows. No Win32 programming experience, but confidence and willingness to learn. Low-level MS-DOS programming experience.

Programming Languages / Environments / Techniques

Very strong experience with C and various assembly languages (IA-32, x86-64, PowerPC, 68000, Intel IXP1200, Intel i960, ARM, 6809, PDP-11). Some familiarity with C++, with strong interest in expanding C++ skills. Familiarity with applying coarse object-oriented techniques in a C environment. Strong experience programming in real-time embedded environments and device drivers involving concepts such as interrupts, asynchronous processes, mutual exclusion, semaphores, priority inversion, reentrancy, and multiple processors. Familiarity with GNU software development toolchain (gcc, gdb, make, etc.), as well as various GUI integrated development environments (ARM, IXP1200, Green Hills MULTI). Experience with various software version control systems including Perforce P4, Subversion, Rational ClearCase, CVS, and RCS. Familiarity and experience with software development and test life cycles (alpha, beta, FCS, etc.). Good experience with script writing in Borne shell, and some experience with Perl and Python. Excellent knowledge and experience with data structures and algorithms (trees, hash tables, linked-lists, etc.)


Strong knowledge of hardware and computer architecture. Very good familiarity with many hardware aspects such as peripheral busses (PCI, Intel IXP1200 IX Bus), memory protection, virtual memory, cache, hard disks, etc. Educational foundation in digital hardware design. Keen interest in expanding my career to include more hardware skills and responsibility, e.g. FPGA design.


Competent with Microsoft Office applications (Word, Excel, PowerPoint, Outlook, etc.).

Other skills

Strong written and verbal communications skills. Excellent one-on-one teaching skills. Described as a "consummate team player."


2006-2008  Panasas, Inc.  Pittsburgh, PA

Software Engineer

Member of the Panasas "Client Team", the team responsible for maintaining and improving the Panasas proprietary distributed filesystem kernel code for the Linux and FreeBSD kernels. Developed assembly-language stack-switching code to solve kernel stack overflows inside the Linux kernel. Developed stack-analysis code to identify the cause of Linux kernel stack overflows. Ported the Panasas kernel module to new Linux kernel versions. Solved kernel compatibility issues to keep the overall Panasas codebase portable to over 300 different Linux kernel versions from various vendor distributions. Designed a binary kernel API "shim" solution to split the Panasas proprietary Linux kernel module into a binary "black box" portion and an open-source "shim" layer (to be compiled on the customer system). Implemented several aspects of the design as a successful proof of concept. Debugged and fixed customer-reported bugs as well as internally-discovered bugs. Broad exposure to Linux kernel internal filesystem interfaces and concepts (VFS layer, inodes, superblocks, dentries, dcache). Visited a customer site to debug a Linux kernel crash, successfully identifying the problem as being an incompatibility with another vendor's proprietary kernel module. Worked with the other vendor to successfully solve the customer's problem. Earned a Panasas "Star" Award for this work. Developed a test Linux kernel with larger kernel stacks, useful for debugging and testing. Produced kernel RPMs for Red Hat Enterprise Linux 4 to make installation easy on hundreds of lab computers. Worked with a Xen-based virtualization environment to test scalability of the Panasas filesystem. This environment provided up to 50 virtual nodes on each of 100 physical nodes. On a rotating basis, led software integration/test cycles across my team and across the company. On a rotating basis, analyzed test failures from weekly regression tests to maintain product quality.

2002-2006  TimeSys Corporation  Pittsburgh, PA

Board Support Engineer

Involved with most aspects of supporting an embedded Linux distribution, with primary focus on kernel bringup on various embedded CPU boards. Significant direct experience with 10+ different embedded CPU boards, and passing exposure to many more. Debugged early kernel crashes with no console output (sometimes using hardware debuggers when available, but frequently without). Forward-ported older device drivers to newer kernel versions. Developed flash mapping drivers. Solved bootloader+kernel integration issues. Added scatter/gather DMA support and hardware checksum support to the ethernet driver for the IBM PPC440GX processor. Converted the Kontron CP-605 to using Etherboot. Ported the VME Universe driver from Linux 2.4 to 2.6. Developed a kernelspace+userspace tracing mechanism in order to debug a very elusive problem with the open source Robust Mutexes extension to Linux. Added board-specific support for several boards to the Linux kernel interrupt and PCI subsystems. Also debugged and integrated various userspace applications/utilities, system initialization scripts, and related root filesystem issues. Provided customer support on an as-needed basis to customers facing more advanced technical challenges.

Addtional special projects included: Integrated open source automated test suites into a TimeSys-developed automated testing framework. Created a secure VMware virtualized Linux environment for exposing the TimeSys software build system to external partner companies. Architected and constructed a "board farm", a centralized collection of various embedded CPU boards with network access to console serial ports as well as network-based power control. The board farm supports automated software testing and also enables geographically-dispersed developers to share scarce embedded CPU boards for remote development. Designed a hardware circuit to automatically power-on embedded CPU boards that have power-on pushbuttons. Ordered all components, including professionally-manufactured bare printed circuit boards. Hand-assembled 10 instances of this circuit for use in the TimeSys board farm.

2000-2002  AcceLight Networks, Inc.  Pittsburgh, PA

Lead Software Engineer

Contributed to initial high-level hardware/software/networking architecture design of the AcceLight Networks PXS 540 Photonic Service Switch, a leading-edge optical IP/MPLS switch/router. This system was a large multi-million dollar product utilizing a breakthrough optical switching fabric surrounded by intelligent distributed packet-processing line cards.

Key member of small team responsible for the detailed design of the distributed IP routing and forwarding software components for the PXS 540.

Designed and developed IP forwarding microcode for the Intel IXP1200 network processor chip, one of the intelligent components present on each PXS 540 line card (up to 64 line cards per system). The IXP1200 chip has a unique multi-processor internal hardware architecture that combines a general-purpose StrongARM RISC processor with 6 specialized RISC "microengines" dedicated to packet processing. The microengines are programmed in their own specialized IXP1200 microcode assembly language, while the StrongARM processor is programmed in C/C++ and ARM assembly language. In typical IXP1200 applications, the StrongARM processor runs an embedded RTOS such as VxWorks or embedded Linux. In AcceLight's PXS 540 design, the StrongARM runs the uC/OS embedded operating system. The IXP1200 chip interfaces with custom FPGAs and an external PowerPC 405 CPU. The IXP1200 bridges the functionality gap between the customized FPGA hardware "below" and the IP routing software "above". Thus I worked closely with both FPGA designers and IP routing protocol implementers. The IXP1200 microcode performs very detailed interaction with the IXP1200 hardware internals, which in turn interact with the external hardware environment. This project combined the best of my low-level embedded software skills with my expert IP router knowledge.

1995-2000  FORE Systems / Marconi Communications  Pittsburgh, PA

Lead Software Engineer, ASX-4000 Software Team

Company expert on Multiprotocol Label Switching (MPLS). Member of a small team of experienced engineers designing and developing an IP routing card for the ASX-4000 40Gbps ATM switch.

Senior Engineer, Architecture Group

Member of a team of 10 very senior engineers (most with Ph.D. degrees) charged with planning FORE Systems' technical direction and vision. Served as the team expert on IP, with particular focus on Multiprotocol Label Switching (MPLS) and IP routing protocols (OSPF, IS-IS, and BGP). Designed and implemented a BOOTP/DHCP Relay Agent for FORE's family of ATM switches (running VxWorks internally).

Senior Engineer, Network Test Lab

Tested and evaluated a broad range of OEM and internally developed networking products to ensure proper interoperation of all FORE Systems products as an integrated, coherent product family. Products included Ethernet switches, Token-Ring switches, circuit-emulation devices, and ATM switches. Served as the team's IP and networking expert, mentoring to junior staff members.

Software Development Engineer, Internet Software Group

Member of a software development team focused on developing IP routing software (routing protocols and associated infrastructure for IP routers). Developed an ATM Address Resolution Protocol server for use with FORE's Classical IP over ATM (CLIP) implementation. Worked on an ATM multicast server for distributing IP multicast traffic throughout an ATM network.

Senior Engineer, Inbound Technology Group

Tested and evaluated a broad range of OEM and internally developed networking products to ensure proper interoperation of all FORE Systems products as an integrated, coherent product family. Products included Ethernet switches, Token-Ring switches, circuit-emulation devices, and ATM switches. Served as the team's IP and networking expert, mentoring to junior staff members.

1988-1995  Carnegie Mellon University  Pittsburgh, PA

Senior Systems Designer

Developed and/or maintained many different networking software systems including a CMU-developed IP router, Domain Name System (DNS) servers, a DNS test suite, BOOTP servers, a network administration database (using Informix/SQL), and a dial-up IP (SLIP) package. Modified, customized, and maintained PC/TCP from FTP Software, Inc., a commercial TCP/IP package for MS-DOS / MS Windows. Key design contributor to Carnegie Mellon's 5000-host campus network. Engineered the network using Ethernet bridges, optical repeaters, and Cisco routers. Performed Cisco configuration and software and hardware upgrades. Resident Cisco expert. Performed system administration for several Unix systems operating as network infrastructure servers (DNS, BOOTP, etc.)


1985-1990  Carnegie Mellon University  Pittsburgh, PA
Bachelor of Science in Computer Engineering

Broad and in-depth curriculum combining elements of electrical engineering and computer science, including software design, analog and digital hardware design, semiconductor device physics, electromagnetic fields, etc. Also exposure to other engineering courses in thermodynamics, fluid mechanics, and materials science. "Depth sequence" in economics.

Associations and Achievements

Internet Engineering Task Force (IETF)

Author of Internet RFC 1542, Clarifications and Extensions for the Bootstrap Protocol (BOOTP). Significant contributor to the design of the Dynamic Host Configuration Protocol (DHCP). Contributor to IETF Router Requirements document, eventually issued as RFC 1812. Regular meeting participant 1990-1995 and 1998-2000.